Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity

dc.contributor.authorBow, Ivan
dc.contributor.authorBete, Nahome
dc.contributor.authorSaqib, Fareena
dc.contributor.authorChe, Wenjie
dc.contributor.authorPatel, Chintan
dc.contributor.authorRobucci, Ryan
dc.contributor.authorChan, Calvin
dc.contributor.authorPlusquellic, Jim
dc.date.accessioned2020-05-13T12:09:56Z
dc.date.available2020-05-13T12:09:56Z
dc.date.issued2020-04-10
dc.description.abstractThis paper investigates countermeasures to side-channel attacks. A dynamic partial reconfiguration (DPR) method is proposed for field programmable gate arrays (FPGAs)s to make techniques such as differential power analysis (DPA) and correlation power analysis (CPA) difficult and ineffective. We call the technique side-channel power resistance for encryption algorithms using DPR, or SPREAD. SPREAD is designed to reduce cryptographic key related signal correlations in power supply transients by changing components of the hardware implementation on-the-fly using DPR. Replicated primitives within the advanced encryption standard (AES) algorithm, in particular, the substitution-box (SBOX)s, are synthesized to multiple and distinct gate-level implementations. The different implementations change the delay characteristics of the SBOXs, reducing correlations in the power traces, which, in turn, increases the difficulty of side-channel attacks. The effectiveness of the proposed countermeasures depends greatly on this principle; therefore, the focus of this paper is on the evaluation of implementation diversity techniques.en_US
dc.description.sponsorshipThis research was funded by National Science Foundation, grant number 1813945.en_US
dc.description.urihttps://www.mdpi.com/2410-387X/4/2/13/htmen_US
dc.format.extent20 pagesen_US
dc.genrejournal articlesen_US
dc.identifierdoi:10.13016/m2berg-yvua
dc.identifier.citationIvan Bow et al., Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity, Cryptography 2020, 4(2), 13; https://doi.org/10.3390/cryptography4020013en_US
dc.identifier.urihttps://doi.org/10.3390/cryptography4020013
dc.identifier.urihttp://hdl.handle.net/11603/18584
dc.language.isoen_USen_US
dc.publisherMDPIen_US
dc.relation.isAvailableAtThe University of Maryland, Baltimore County (UMBC)
dc.relation.ispartofUMBC Computer Science and Electrical Engineering Department Collection
dc.relation.ispartofUMBC Faculty Collection
dc.rightsThis item is likely protected under Title 17 of the U.S. Copyright Law. Unless on a Creative Commons license, for uses protected by Copyright Law, contact the copyright holder or the author.
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 United States*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/us/*
dc.titleSide-Channel Power Resistance for Encryption Algorithms Using Implementation Diversityen_US
dc.typeTexten_US

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