Implementation Of Novel Power Combining Techniques On Solid State Power Amplifier (Sspa) Chip Designs To Improve Efficiency And Power Performance
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Type of WorkText
DepartmentElectrical and Computer Engineering
ProgramDoctor of Engineering
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Current communication systems at Ka-band are using traveling wave tube amplifiers (TWTAs) that are bulky, costly and require high-voltage power supplies. Advances on solid state device technologies with benefits such as low supply voltage, graceful degradation, lower development cost, and high power densities have made solid state power amplifiers (SSPAs) very attractive as TWTA replacements. These attributes are beneficial to the military's need for reducing size, weight, and prime power (SWAP) and cost of the existing electronic components. The Gallium Arsenide (GaAs) device technology has been the workhorse of the solid state power amplifiers (SSPAs) for the last two decades and has demonstrated maturity at the Ka-band frequencies. Gallium Nitride (GaN), though less mature, is increasingly becoming the technology of choice for high frequency, high power applications due to its desirable attributes (i.e. high breakdown fields, high power density, and high electron saturation velocity). The SSPA modules currently available at Ka-band are based on GaAs device technology and utilize very low power (<2W) and less efficient (<20% power added efficiency (PAE)) monolithic microwave integrated circuits (MMICs). There is a need to improve the power and efficiency of current MMICs by incorporating on-chip planar power combining. This research focuses on the design of a highly efficient multi-watt SSPA chip at Ka-band for space, defense and commercial wireless communications applications. GaAs- and GaN- based device technologies are utilized in this research to demonstrate the feasibility of achieving multi-watt PAs with >40% PAE at Ka-band. Class AB biasing has been chosen for the design to obtain a good compromise between linearity and efficiency performances. Additionally, a novel planar power combining network that incorporates harmonic suppression, Wei-Chi, is implemented in the chip design to improve on the power and efficiency performance without degrading linearity performance. This Wei-Chi combiner performance is also compared to the Wilkinson combiner, which is commonly used in MMIC design. S-band GaN-based microwave integrated circuits (MICs) using Cree's 10W GaN HEMT packaged devices were designed to verify the feasibility of the approach. The MMIC designs for this work included a GaAs-based chip using Triquint's 0.13μm pHEMT process and a GaN-based chip on Triquint's 0.15μm GaN on SiC HEMT process. Both designs implemented the Wei-Chi combiner at Ka-band. The GaAs MMIC design has demonstrated measured output power of 22 dBm and 39.32 % PAE at 26.5 GHz. In addition, the simulated results for the GaN MMIC design are presented in this research. The GaN MMIC is expected to deliver >2W output power with 40% PAE.