Bow, IvanBete, NahomeSaqib, FareenaChe, WenjiePatel, ChintanRobucci, RyanChan, CalvinPlusquellic, Jim2020-05-132020-05-132020-04-10Ivan Bow et al., Side-Channel Power Resistance for Encryption Algorithms Using Implementation Diversity, Cryptography 2020, 4(2), 13; https://doi.org/10.3390/cryptography4020013https://doi.org/10.3390/cryptography4020013http://hdl.handle.net/11603/18584This paper investigates countermeasures to side-channel attacks. A dynamic partial reconfiguration (DPR) method is proposed for field programmable gate arrays (FPGAs)s to make techniques such as differential power analysis (DPA) and correlation power analysis (CPA) difficult and ineffective. We call the technique side-channel power resistance for encryption algorithms using DPR, or SPREAD. SPREAD is designed to reduce cryptographic key related signal correlations in power supply transients by changing components of the hardware implementation on-the-fly using DPR. Replicated primitives within the advanced encryption standard (AES) algorithm, in particular, the substitution-box (SBOX)s, are synthesized to multiple and distinct gate-level implementations. The different implementations change the delay characteristics of the SBOXs, reducing correlations in the power traces, which, in turn, increases the difficulty of side-channel attacks. The effectiveness of the proposed countermeasures depends greatly on this principle; therefore, the focus of this paper is on the evaluation of implementation diversity techniques.20 pagesen-USThis item is likely protected under Title 17 of the U.S. Copyright Law. Unless on a Creative Commons license, for uses protected by Copyright Law, contact the copyright holder or the author.Attribution-NonCommercial-NoDerivs 3.0 United StatesSide-Channel Power Resistance for Encryption Algorithms Using Implementation DiversityText