Application Scalability and Performance on Multicore Architectures
| dc.contributor.author | Simon, Tyler A. | |
| dc.contributor.author | Cable, S. | |
| dc.contributor.author | Mahmoodi, M. | |
| dc.date.accessioned | 2025-06-05T14:03:33Z | |
| dc.date.available | 2025-06-05T14:03:33Z | |
| dc.date.issued | 2007-06 | |
| dc.description | 2007 DoD High Performance Computing Modernization Program Users Group Conference | |
| dc.description.abstract | The US Army Engineer Research and Development Center Major Shared Resource Center has recently upgraded its Cray XT3 system from single-core to dual- core AMD Opteron processors and has procured a quad- core XT4 supercomputer for installation in early 2008. This paper provides performance analysis of several representative Department of Defense applications executed on single-core and dual-core AMD Opteron processors. The authors provide a detailed strong- scaling study that focuses on addressing some areas of contention that may lead to increased job run times on applications running on many thousands of processors. The authors intend to use the results of this study as a guide for determining application performance on the quad-core Cray XT4. | |
| dc.description.sponsorship | This work was conducted using computer time from the DoD High Performance Computing Modernization Program at the ERDC MSRC Information Technology Laboratory Vicksburg MS | |
| dc.description.uri | https://ieeexplore.ieee.org/abstract/document/4438014 | |
| dc.format.extent | 4 pages | |
| dc.genre | conference papers and proceedings | |
| dc.identifier | doi:10.13016/m2ysnr-ccgj | |
| dc.identifier.uri | https://doi.org/10.1109/HPCMP-UGC.2007.10 | |
| dc.identifier.uri | http://hdl.handle.net/11603/38723 | |
| dc.language.iso | en_US | |
| dc.publisher | IEEE | |
| dc.relation.isAvailableAt | The University of Maryland, Baltimore County (UMBC) | |
| dc.relation.ispartof | UMBC Computer Science and Electrical Engineering Department | |
| dc.rights | This work was written as part of one of the author's official duties as an Employee of the United States Government and is therefore a work of the United States Government. In accordance with 17 U.S.C. 105, no copyright protection is available for such works under U.S. Law. | |
| dc.rights | Public Domain | |
| dc.rights.uri | https://creativecommons.org/publicdomain/mark/1.0/ | |
| dc.subject | Supercomputers | |
| dc.subject | Scalability | |
| dc.subject | Research and development | |
| dc.subject | Yarn | |
| dc.subject | High performance computing | |
| dc.subject | Power cables | |
| dc.subject | Navier-Stokes equations | |
| dc.subject | Hardware | |
| dc.subject | Adaptive mesh refinement | |
| dc.subject | Multicore processing | |
| dc.title | Application Scalability and Performance on Multicore Architectures | |
| dc.type | Text |
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