Differential current-mode clock distribution

dc.contributor.authorIslam, Riadul
dc.contributor.authorFahmy, Hany
dc.contributor.authorLin, Ping-Yao
dc.contributor.authorGuthaus, Matthew R.
dc.date.accessioned2021-04-14T17:28:20Z
dc.date.available2021-04-14T17:28:20Z
dc.date.issued2015-10-01
dc.description2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, CO, USAen_US
dc.description.abstractIn this paper, we present a differential current-mode pulsed flip-flop (DCMPFF) for low-power clock distribution using a representative 45nm CMOS technology. Experimental results show that the DCMPFF has 47% faster clock-to-output (CLK-Q) delay than a traditional voltage-mode (VM) pulsed flip-flop. When the DCMPFF is integrated with a differential current-mode clock distribution, the differential technique saves 62% and 17% power compared to a conventional VM and a previous current-mode (CM) clock network, respectively.en_US
dc.description.sponsorshipThis work was supported in part by the National Science Foundation under grant CCF-1053838en_US
dc.description.urihttps://ieeexplore.ieee.org/document/7282042en_US
dc.format.extent5 pagesen_US
dc.genreconference papers and proceedings postprintsen_US
dc.identifierdoi:10.13016/m2wwnu-jmsh
dc.identifier.citationR. Islam, H. Fahmy, Ping-Yao Lin and M. R. Guthaus, "Differential current-mode clock distribution," 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, CO, USA, 2015, pp. 1-4, doi: 10.1109/MWSCAS.2015.7282042.en_US
dc.identifier.urihttps://doi.org/10.1109/MWSCAS.2015.7282042
dc.identifier.urihttp://hdl.handle.net/11603/21335
dc.language.isoen_USen_US
dc.publisherIEEEen_US
dc.relation.isAvailableAtThe University of Maryland, Baltimore County (UMBC)
dc.relation.ispartofUMBC Computer Science and Electrical Engineering Department Collection
dc.rightsThis item is likely protected under Title 17 of the U.S. Copyright Law. Unless on a Creative Commons license, for uses protected by Copyright Law, contact the copyright holder or the author.
dc.rights© 2015 IEEE.  Personal use of this material is permitted.  Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works
dc.titleDifferential current-mode clock distributionen_US
dc.typeTexten_US

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