Developing a chip-scale optical clock
dc.contributor.author | Zhou, Weimin | |
dc.contributor.author | Cahill, James | |
dc.contributor.author | Ni, Jimmy H. | |
dc.contributor.author | Deloach, Andrew | |
dc.contributor.author | Cho, Sang-Yeon | |
dc.contributor.author | Anderson, Stephen | |
dc.contributor.author | Mahmood, Tanvir | |
dc.contributor.author | Sykes, Patrick | |
dc.contributor.author | Sarney, Wendy L. | |
dc.contributor.author | Leff, Asher C. | |
dc.date.accessioned | 2021-03-25T16:13:38Z | |
dc.date.available | 2021-03-25T16:13:38Z | |
dc.date.issued | 2021-02-27 | |
dc.description.abstract | We report our in-house R&D efforts of designing and developing key integrated photonic devices and technologies for a chip-scale optical oscillator and/or clock. This would provide precision sources to RF-photonic systems. It could also be the basic building block for a photonic technology to provide positioning, navigation, and timing as well as 5G networks. Recently, optical frequency comb (OFC)-based timing systems have been demonstrated for ultra-precision time transfer. Our goal is to develop a semiconductor-based, integrated photonic chip to reduce the size, weight, and power consumption, and cost of these systems. Our approach is to use a self-referenced interferometric locking circuit to provide short-term stabilization to a micro-resonator-based OFC. For long-term stabilization, we use an epsilon-near-zero (ENZ) metamaterial to design an environment-insensitive cavity/resonator, thereby enabling a chip-scale optical long-holdover clock. | en_US |
dc.description.sponsorship | We would like thank Professor Kerry Vahala for the invaluable technical discussions and providing high-Q micro-resonators for our study; we thank Professor Curtis Menyuk for providing technical assistance in theoretical soliton study; we thank Professor Rena Huang for helpful discussion for the integrated photonics, and thank Professor Nanshu Lu for the helpful technical discussion in mechanical simulation of the resonator devices; we thank Dr. Jenna Chan and Dr. Jonathan Hoffman for their management and technical support. | en_US |
dc.description.uri | https://www.spiedigitallibrary.org/journals/optical-engineering/volume-60/issue-02/027107/Developing-a-chip-scale-optical-clock/10.1117/1.OE.60.2.027107.full?SSO=1 | en_US |
dc.format.extent | 14 pages | en_US |
dc.genre | journal articles | en_US |
dc.identifier | doi:10.13016/m26qxb-tvzn | |
dc.identifier.citation | Weimin Zhou, James Cahill, Jimmy H. Ni, Andrew Deloach, Sang-Yeon Cho, Stephen Anderson, Tanvir Mahmood, Patrick Sykes, Wendy L. Sarney, and Asher C. Leff "Developing a chip-scale optical clock," Optical Engineering 60(2), 027107 (27 February 2021). https://doi.org/10.1117/1.OE.60.2.027107 | en_US |
dc.identifier.uri | https://doi.org/10.1117/1.OE.60.2.027107 | |
dc.identifier.uri | http://hdl.handle.net/11603/21210 | |
dc.language.iso | en_US | en_US |
dc.publisher | SPIE | en_US |
dc.relation.isAvailableAt | The University of Maryland, Baltimore County (UMBC) | |
dc.relation.ispartof | UMBC Computer Science and Electrical Engineering Department Collection | |
dc.relation.ispartof | UMBC Student Collection | |
dc.rights | This item is likely protected under Title 17 of the U.S. Copyright Law. Unless on a Creative Commons license, for uses protected by Copyright Law, contact the copyright holder or the author. | |
dc.rights | Public Domain Mark 1.0 | * |
dc.rights | This work was written as part of one of the author's official duties as an Employee of the United States Government and is therefore a work of the United States Government. In accordance with 17 U.S.C. 105, no copyright protection is available for such works under U.S. Law | |
dc.rights.uri | http://creativecommons.org/publicdomain/mark/1.0/ | * |
dc.title | Developing a chip-scale optical clock | en_US |
dc.type | Text | en_US |