Developing a chip-scale optical clock

dc.contributor.authorZhou, Weimin
dc.contributor.authorCahill, James
dc.contributor.authorNi, Jimmy H.
dc.contributor.authorDeloach, Andrew
dc.contributor.authorCho, Sang-Yeon
dc.contributor.authorAnderson, Stephen
dc.contributor.authorMahmood, Tanvir
dc.contributor.authorSykes, Patrick
dc.contributor.authorSarney, Wendy L.
dc.contributor.authorLeff, Asher C.
dc.date.accessioned2021-03-25T16:13:38Z
dc.date.available2021-03-25T16:13:38Z
dc.date.issued2021-02-27
dc.description.abstractWe report our in-house R&D efforts of designing and developing key integrated photonic devices and technologies for a chip-scale optical oscillator and/or clock. This would provide precision sources to RF-photonic systems. It could also be the basic building block for a photonic technology to provide positioning, navigation, and timing as well as 5G networks. Recently, optical frequency comb (OFC)-based timing systems have been demonstrated for ultra-precision time transfer. Our goal is to develop a semiconductor-based, integrated photonic chip to reduce the size, weight, and power consumption, and cost of these systems. Our approach is to use a self-referenced interferometric locking circuit to provide short-term stabilization to a micro-resonator-based OFC. For long-term stabilization, we use an epsilon-near-zero (ENZ) metamaterial to design an environment-insensitive cavity/resonator, thereby enabling a chip-scale optical long-holdover clock.en_US
dc.description.sponsorshipWe would like thank Professor Kerry Vahala for the invaluable technical discussions and providing high-Q micro-resonators for our study; we thank Professor Curtis Menyuk for providing technical assistance in theoretical soliton study; we thank Professor Rena Huang for helpful discussion for the integrated photonics, and thank Professor Nanshu Lu for the helpful technical discussion in mechanical simulation of the resonator devices; we thank Dr. Jenna Chan and Dr. Jonathan Hoffman for their management and technical support.en_US
dc.description.urihttps://www.spiedigitallibrary.org/journals/optical-engineering/volume-60/issue-02/027107/Developing-a-chip-scale-optical-clock/10.1117/1.OE.60.2.027107.full?SSO=1en_US
dc.format.extent14 pagesen_US
dc.genrejournal articlesen_US
dc.identifierdoi:10.13016/m26qxb-tvzn
dc.identifier.citationWeimin Zhou, James Cahill, Jimmy H. Ni, Andrew Deloach, Sang-Yeon Cho, Stephen Anderson, Tanvir Mahmood, Patrick Sykes, Wendy L. Sarney, and Asher C. Leff "Developing a chip-scale optical clock," Optical Engineering 60(2), 027107 (27 February 2021). https://doi.org/10.1117/1.OE.60.2.027107en_US
dc.identifier.urihttps://doi.org/10.1117/1.OE.60.2.027107
dc.identifier.urihttp://hdl.handle.net/11603/21210
dc.language.isoen_USen_US
dc.publisherSPIEen_US
dc.relation.isAvailableAtThe University of Maryland, Baltimore County (UMBC)
dc.relation.ispartofUMBC Computer Science and Electrical Engineering Department Collection
dc.relation.ispartofUMBC Student Collection
dc.rightsThis item is likely protected under Title 17 of the U.S. Copyright Law. Unless on a Creative Commons license, for uses protected by Copyright Law, contact the copyright holder or the author.
dc.rightsPublic Domain Mark 1.0*
dc.rightsThis work was written as part of one of the author's official duties as an Employee of the United States Government and is therefore a work of the United States Government. In accordance with 17 U.S.C. 105, no copyright protection is available for such works under U.S. Law
dc.rights.urihttp://creativecommons.org/publicdomain/mark/1.0/*
dc.titleDeveloping a chip-scale optical clocken_US
dc.typeTexten_US

Files

Original bundle
Now showing 1 - 1 of 1
Loading...
Thumbnail Image
Name:
027107_1.pdf
Size:
2.66 MB
Format:
Adobe Portable Document Format
Description:
License bundle
Now showing 1 - 1 of 1
No Thumbnail Available
Name:
license.txt
Size:
2.56 KB
Format:
Item-specific license agreed upon to submission
Description: