Impact of Process Mismatch and Device Aging on SR-Latch Based True Random Number Generators

Abstract

The True Random Number Generator (TRNG) is an inescapable primitive for security and cryptographic functions. A common TRNG architecture in digital devices exploits the noise jitter accumulation with ring oscillators. The Set-Reset latch (SR-latch) TRNG is another type which exploits the state of latches around metastability. In this TRNG the dynamic noise is extracted by analysing the convergence state of the related latch. The advantage is its very high throughput as it runs at (or near) the clock frequency. However, it is not so popular as there is no assurance that the quality of the randomness will exist in real silicon. This notably comes from the fact that there is a lack of a proven stochastic model against the quality of the process, and about its unknown behavior evolution over time (when aged). This makes the evaluation methods, like BSI AIS-31 or NIST SP 800-90B, difficult to succeed. To fill the gap, in this paper, we propose a closed form of the average entropy of the SR-latch based TRNG taking into account the process mismatch and allowing the designer to know precisely the number of SR-latches required for an optimal entropy. This is highly crucial to avoid low entropy if not enough latches are integrated, yet meanwhile preventing high overhead by not including more latches than needed. Moreover, the impact of device aging is deeply studied by simulation over 7 years. Interestingly, the results show that the aging has no significant impact on the entropy. This makes the SR-latch based TRNG a good candidate, for main TRNG or as a second entropy source.