The Hybrid Task Graph Scheduler
| dc.contributor.advisor | Halem, Milton | |
| dc.contributor.author | Blattner, Timothy James | |
| dc.contributor.department | Computer Science and Electrical Engineering | |
| dc.contributor.program | Computer Science | |
| dc.date.accessioned | 2019-10-11T13:39:15Z | |
| dc.date.available | 2019-10-11T13:39:15Z | |
| dc.date.issued | 2016-01-01 | |
| dc.description.abstract | Scalability of applications is a key requirement to gaining performance in hybrid and cluster computing. Implementing code to utilize multiple accelerators and CPUs is difficult, particularly when dealing with dependencies, memory management, data locality, and processor occupancy. The Hybrid Task Graph Scheduler (HTGS) is designed to increase programmer productivity to develop applications for single nodes with multiple CPUs and accelerators. Current task graph schedulers provide APIs, directives, and compilers to schedule work on nodes; however, many fail to expose the locality of data and often use a single address space to represent memory resulting in inefficient data transfer patterns for accelerators. HTGS merges dataflow and traditional task graph schedulers into a novel model to assist developers in exposing the parallelism and data locality of their algorithm. With the HTGS model, an algorithm is represented at a high level of abstraction and modularizes the computationally intensive components as a series of concurrent tasks. Using this approach, the model explicitly defines memory for each address space and provides interfaces to express the locality of data between tasks. The result achieves the full performance of the node comparable to the best of breed implementations of algorithms such as matrix multiplication and LU decomposition. The performance gains are demonstrated with a modest effort using the HTGS C++ API, which improves programmer productivity with obtaining that performance. | |
| dc.genre | dissertations | |
| dc.identifier | doi:10.13016/m2r2ds-qza0 | |
| dc.identifier.other | 11563 | |
| dc.identifier.uri | http://hdl.handle.net/11603/15470 | |
| dc.language | en | |
| dc.relation.isAvailableAt | The University of Maryland, Baltimore County (UMBC) | |
| dc.relation.ispartof | UMBC Computer Science and Electrical Engineering Department Collection | |
| dc.relation.ispartof | UMBC Theses and Dissertations Collection | |
| dc.relation.ispartof | UMBC Graduate School Collection | |
| dc.relation.ispartof | UMBC Student Collection | |
| dc.rights | This item may be protected under Title 17 of the U.S. Copyright Law. It is made available by UMBC for non-commercial research and education. For permission to publish or reproduce, please see http://aok.lib.umbc.edu/specoll/repro.php or contact Special Collections at speccoll(at)umbc.edu | |
| dc.source | Original File Name: Blattner_umbc_0434D_11563.pdf | |
| dc.subject | application program interface | |
| dc.subject | execution pipelines | |
| dc.subject | high performance computing | |
| dc.subject | multiple accelerators | |
| dc.subject | programming model | |
| dc.subject | task graph scheduling | |
| dc.title | The Hybrid Task Graph Scheduler | |
| dc.type | Text | |
| dcterms.accessRights | Distribution Rights granted to UMBC by the author. |