Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks

dc.contributor.authorChallagundla, Dhandeep
dc.contributor.authorGalib, Md Mehedi Hassan
dc.contributor.authorBezzam, Ignatius
dc.contributor.authorIslam, Riadul
dc.date.accessioned2022-06-27T19:10:42Z
dc.date.available2022-06-27T19:10:42Z
dc.date.issued2022-11-11
dc.description2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 27 May 2022 - 01 June 2022
dc.description.abstractAs the demand for high-performance microprocessors increases, the circuit complexity and the rate of data transfer increases resulting in higher power consumption. We propose a clocking architecture that uses a series LC resonance and inductor matching technique to address this bottleneck. By employing pulsed resonance, the switching power dissipated is recycled back. The inductor matching technique aids in reducing the skew, increasing the robustness of the clock network. This new resonant architecture saves over 43% power and 91% skew clocking a range of 1--5 GHz, compared to a conventional primary-secondary flip-flop-based CMOS architecture.en_US
dc.description.sponsorshipThis work was supported in part by the Rezonent Inc. under Grant CORP0061 and the UMBC Startup grant.en_US
dc.description.urihttps://ieeexplore.ieee.org/abstract/document/9937771en_US
dc.format.extent5 pagesen_US
dc.genreconference papers and proceedingsen_US
dc.genrepreprintsen_US
dc.identifierdoi:10.13016/m2xoih-knwq
dc.identifier.citationD. Challagundla, M. Galib, I. Bezzam and R. Islam, "Power and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocks," 2022 IEEE International Symposium on Circuits and Systems (ISCAS), Austin, TX, USA, 2022, pp. 268-272, doi: 10.1109/ISCAS48785.2022.9937771.
dc.identifier.urihttps://doi.org/10.1109/ISCAS48785.2022.9937771
dc.identifier.urihttp://hdl.handle.net/11603/25052
dc.language.isoen_USen_US
dc.publisherIEEE
dc.relation.isAvailableAtThe University of Maryland, Baltimore County (UMBC)
dc.relation.ispartofUMBC Computer Science and Electrical Engineering Department Collection
dc.relation.ispartofUMBC Faculty Collection
dc.relation.ispartofUMBC Student Collection
dc.rights© 2022 IEEE.  Personal use of this material is permitted.  Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.en_US
dc.titlePower and Skew Reduction Using Resonant Energy Recycling in 14-nm FinFET Clocksen_US
dc.typeTexten_US
dcterms.creatorhttps://orcid.org/0000-0002-5683-7016en_US
dcterms.creatorhttps://orcid.org/0000-0002-4649-3467en_US

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